Abstract
The purpose of this paper is to design and implementation of smart traffic light controller system using VHDL language and FPGA. A structure of four road intersection has been selected. The intersection to be controlled is between a busy (main street), and somewhat less busy (side street), with sensor for the side street and walk request button. Also, the system contains switches to control the traffic light manually. The intersection uses four timing parameters with ability to change these parameters manually. The system has been successfully tested with VHDL using Xilinx ISE 14.7i software environment and Chip-Scope, while, it is implemented in hardware using Xilinx Spartan 3E FPGA. It is easy to use and the cost for the same is also less as compared to the others. The designed traffic light control system is presented to work correctly as predictable.
Highlights
Traffic jamming is a critical predicament in many of the cities and towns all over the world
Most of the Traffic light controller (TLC) implemented on FPGA are simple ones that have been implemented as examples of Finite State Machine (FSM)
The traffic light controller system design is implemented by synthesizing the VHDL structural code design, generating bit file using Xilinx ISE 14.7 tools
Summary
Traffic jamming is a critical predicament in many of the cities and towns all over the world. The problem of heavy jam is happened because of never configure the level of jam in each way and set the delay time Another problem represents when there is no jam, but the waiting still continues. Traffic light controller (TLC) can be implemented using microcontroller, FPGA, and ASIC design. [7] The VHDL language has been selected for programming the FPGA to fill two important needs in the design process It gives full description of the structure of a design that is how it is decomposed into sub-designs, and how those sub-designs are interconnected. A traffic light system is designed using VHDL and implemented by a single FPGA chip.
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