Abstract
Design and Implementation of Low Power AES SBOX with Error Detection Circuit
Highlights
Cryptographic algorithms play a crucial role in the information society
We focus on the design and implementation of low power Advanced Encryption Standard (AES) SBox with error detection circuit Compared to previous works, our solution has produced low area and power
Proposed solution implementation of AES s-box error detection circuit: In this study, we focus on the use of the parity code for a single SBox
Summary
When we use teller machines, home banking services or credit cards, call someone on a mobile phone, get access to health care services, or buy something on the web, cryptographic algorithms are used to offer protection. These algorithms guarantee that nobody can steal our money, place a call at our expense, eavesdrop on our phone calls, or get unauthorized access to sensitive health data. Information technology keeps changing and will become increasingly pervasive, while disappearing from the eye of the user This evolution keeps presenting new security challenges and there is no doubt that cryptographic algorithms and protocols will form an important part of the solution (Bertoni et al, 2003). Intentional intrusions and attacks based on the malicious injection of transient faults into the device are very efficient in order to extract the secret key (Boneh et al, 2001; Bertoni et al, 2003)
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