Abstract

Under certain circumstances, where GPU is not available, the computing power of the CPU alone may not be sufficient enough to run speech recognition system efficiently. As a reconfigurable heterogeneous device, FPGA has the characteristics of high parallelism, low power consumption, and high flexibility. It can support high-performance computing acceleration for speech recognition applications. In order to implement speech recognition system on an specified computing platform, a speech recognition system architecture is proposed, which is based on software and hardware cooperative computing technology that focus on FPGA. First, a system architecture based on gated convolutional neural network is designed, with the simplification of the traditional speech recognition system architecture. Then a modular design idea is used to map the gated convolutional neural network operator to the FPGA hardware logic. Further through the state machine to schedule and control the data stream and operators, to achieve the flexible acceleration of the voice recognition network model. AISHELL data set is used to carry out the test, where presents remarkable improvement on computing performance, compared with Feiteng 1500A processor, the efficiency is improved by 18.1 times.

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