Design and Implementation of Format Conversion Filters for MPEG-4

Abstract

This paper proposes new format conversion filters. The proposed filters have advantages in hardware complexity and operating speed over the ones proposed in the MPEG-4 video verification model (VM). Each coefficient of the proposed filters is constrained to have no more than two non-zero digits in minimal signed digit representation, leading to single adder implementation of each filter tap. As a result, the proposed filters have advantages in hardware complexity and speed, compared to conventional filters which are usually implemented by expensive fast adders or multipliers. Several format conversion filters are designed for replacing the filters proposed in the MPEG-4 video VM. Comparing the PSNRs of the images processed by the proposed filters and the ones in the MPEG-4 video VM, it is shown that they provide almost the same performance. In conclusion, the performance of the proposed filters is comparable to that of those in the MPEG-4 video VM, while requiring lower hardware complexity and providing higher operating speed.