Design and Implementation of Extended 16 Bit Co-Operative Arithmetic and Logic Unit (CALU) for 16 Bit Instructions

Abstract

CPU architecture has experienced great innovation in its architecture, from 8 bit to 64 bit, CISC to RISC, Single core to multi-core and single pipelined logic to deep multi-pipelined system. Today in an era of 64 bit architectures, 8 bits are still very relevant and has not lost its position and being used in many applications. Hence this research work deals with 8 bit CPU architecture and its features enhancement to make the 8 bit case very relevant in an era of 64 bit. The co-operative ALU, as name suggests, works in tandem with existing ALU and performs 16 bits operations. The specially designed instructions shares knowledge and efficiently handles existing ALU and Co-operative ALU to perform 8 bits and 16 bits operations. The Co-operative ALU is integrated with the 2 stage pipelined 8-bit RISC architecture ensuring that existing architecture is kept intact by way of applying new functionality in the form of an extension. The reconfigurable platform software tools are used for functionality verification and final deployment is done using reconfigurable platform hardware tools.