Abstract
In computing architecture, ALU plays a major role. Many promising applications are possible with ATMEGA microcontroller. ALU is a part of these microcontrollers. The performance of these microcontrollers can be improved by applying Reversible Logic and Vedic Mathematics. In this paper, an efficient reversible Arithmetic and Logic Unit with reversible Vedic Multiplier is proposed and the simulation results show its effectiveness in reducing quantum cost, number of gates, and the total number of logical calculations.
Highlights
Moore’s law states that number of transistors in a chip doubles every two years but chip size decreases. This cannot be reduced greatly which will lead to more power consumption. This paves the path to new technologies “Reversible Logic” and “Quantum Dot Cellular Automata” (QCA)
Reversible Logic is chosen for its low power and Vedic concept is used for its faster arithmetic calculations
The proposed reversible multiplier designed using HNG gate used in ALU shows better results in terms of delay and quantum cost
Summary
Moore’s law states that number of transistors in a chip doubles every two years but chip size decreases. This cannot be reduced greatly which will lead to more power consumption. As stated by Launder irreversible logic (unequal number of inputs and outputs) consumes more power [1] To overcome this problem Bennett sets equal number of inputs and outputs, which will dissipate less power as input bits are preserved at the output [2]. Quantum computers are faster than classical computer and will find its application in air craft tester, driverless cars and develop more effective
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