Design and Implementation of Digital Delay Line Integrator (DDLI) using FPGA and DSP

Abstract

In the present work, the design and implementation of digital delay line integrator (DDLI) which is a common radar signal processing technique is proposed. The design and implementation is achieved using two of the new developed digital hardware platforms: Digital Signal Processors (DSP) and Field Programmable Gate Arrays (FPGAs). Comparison between these developed digital hardware platforms based on the implemented DDLI is introduced. This is done to find out the aspects of choosing which platform is the best for implementing certain radar signal processing technique.