Abstract

Multilevel inverters with a high device count, low boosting and DC voltage imbalance are all common problems exists in the traditional topologies. In this article, a new single-phase asymmetrical multilevel inverter (MLI) that can generate 33 levels at the output with fewer components and lower total standing voltage (TSV) at the switches is presented. The multiple input sources of the proposed inverter make it suited for the use in renewable energy generating systems which have a variety of DC sources. The stress distribution among the switches is investigated that reduces the use of high rated devices with which overall cost of the inverter gets reduced. The topology can be extended by adding the circuits in series for higher levels. The performance of the inverter is calculated considering a variety of critical parameters such as TSV, cost function (CF), power loss, and efficiency calculations. The MLI is tested under dynamic load conditions with sudden load disturbances with a range of combinational loads and it has been determined to be stable throughout its operation. A detailed comparison is made based on stress across the switches, stress distribution, switches count, DC sources count, gate driver circuits, component count factor, TSV, CF, and other existing topologies using graphical representations and shown to be cost-effective and superior in all aspects. The total harmonic distortion (THD) derived from simulation and experiment complies with IEEE standards. The proposed framework has been developed in MATLAB/Simulink and tested in a laboratory environment with hardware.

Highlights

  • The academic and industrial sectors are very interested in multilevel inverters

  • Multilevel inverters are used in a variety of applications, including uninterruptible power supply systems (UPS) [2], The associate editor coordinating the review of this manuscript and approving it for publication was Zhilei Yao

  • COMPARISON ANALYSIS AND APPLICATION The proposed multilevel inverter (MLI) is validated by comparing with other structures based on several key parameters such as the switches count (NS), gate drivers (Ngd), DC sources (Ndc), diodes (ND), capacitors (NC), total standing voltage (TSVpu), components count per level factor (CC/L), cost function per level count (CF/L), and the number of levels to switches ratio (NL/NS)

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Summary

INTRODUCTION

The academic and industrial sectors are very interested in multilevel inverters. Multilevel strategies improve the inverter’s output power quality while allowing for higher voltage levels in power electronic circuits. [1]. Reference [23] Offers a series-connected linear dc-source value development This architecture requires higher switch voltage ratings and high stress across the switches on the inverter. The topology presented in [25] proposed a new MLI with a redesigned H-bridge and numerous dc-sources These topologies require fewer gate driver circuits, bidirectional type of power electronic switches tends to have a gradual increase of switches and size of the inverter. The ST-type architecture employs 12 power electronic switches to provide a seventeen levels of output voltage, with input excitation magnitudes to be opted using the trinary progression technique Even though these topologies offer an output levels count with a limited sources count, they have a more switches count [26]. Section-6 is followed by the conclusions and future scope

PROPOSED INVERTER TOPOLOGY
OPERATION OF THE PROPOSED TOPOLOGY
POWER LOSS CALCULATION
COMPARISON ANALYSIS AND APPLICATION
RESULTS AND DISCUSSION
CONCLUSION
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