Design and implementation of an efficient single layer five input majority voter gate in quantum-dot cellular automata.

Ali Newaz Bahar,Sajjad Waheed

doi:10.1186/s40064-016-2220-7

Ali Newaz Bahar, Sajjad Waheed

Open Access

https://doi.org/10.1186/s40064-016-2220-7

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Abstract

The fundamental logical element of a quantum-dot cellular automata (QCA) circuit is majority voter gate (MV). The efficiency of a QCA circuit is depends on the efficiency of the MV. This paper presents an efficient single layer five-input majority voter gate (MV5). The structure of proposed MV5 is very simple and easy to implement in any logical circuit. This proposed MV5 reduce number of cells and use conventional QCA cells. However, using MV5 a multilayer 1-bit full-adder (FA) is designed. The functional accuracy of the proposed MV5 and FA are confirmed by QCADesigner a well-known QCA layout design and verification tools. Furthermore, the power dissipation of proposed circuits are estimated, which shows that those circuits dissipate extremely small amount of energy and suitable for reversible computing. The simulation outcomes demonstrate the superiority of the proposed circuit.

Highlights

A day’s, CMOS technology is approaching its physical boundary and facing earnest challenges by designing perpetually incrementing frequencies and downscaling of computational devices
quantum-dot cellular automata (QCA) based memory unit, reversible logic and arithmetic logic circuit have been considered in several studies (Kim et al 2007; Navi et al 2010; Hänninen and Takala 2010; Hashemi et al 2012; Qanbari and Sabbaghi-Nadooshan 2013; Kianpour and Sabbaghi-Nadooshan 2014; Sayedsalehi et al 2015; Angizi et al 2015; Bahar et al 2015)
Power dissipation of proposed QCA full‐adder The power dissipates from a single cell depends on the rate of change of the clock and the tunneling energy

Summary

Introduction

A day’s, CMOS technology is approaching its physical boundary and facing earnest challenges by designing perpetually incrementing frequencies and downscaling of computational devices. Most QCA circuits have been investigated and designed only by means of 3-input majority gates (MV3).

Results

Conclusion