Design and Implementation of a 10-bit SAR ADC with A Programmable Reference

Abstract

This paper presents the development of a 38.5 kS/s 10-bit programmable reference SAR ADC which is in MIMOS’s 0.35 μm CMOS process. The design uses a resistive DAC, a dynamic comparator with pre-amplifier and logic to create 10 effective bits ADC. A programmable reference circuitry allows the ADC to operate with different input ra 0.6 V to 2.1 V. The ADC consumed less than 7.5 mW power with a 3 V supply. Keywords—Successive Approximation Register Analog Digital Converter, SAR ADC, Resistive DAC Reference.