Design and Implementation Issues of Parallel Vector Quantization in FPGA for Real Time Image Compression

Abstract

AbstractIn this paper a 4 codebook, Vector Quantization (VQ) core is implemented on FPGA (Field Programmable Gate Array). The proposed design has certain advantages over the earlier architecture in the form of design reuse of VQ core to build a large VQ system. The proposed core aims at increased compressing speed, modular design for design flexibility, easy reconfigurability. Modularity helps in flexile design changes for VQ with different codebook sizes and hence controls the recovered image quality. In general, the new VQ core, meets the specific and challenging needs of a single functioned, tightly constrained real time VQ encoder. The synthesis results show that a speed up of 5 is achieved. Experiments and analyses indicate that our design can satisfy the performance requirements of 30 image frames per sec for a real time image processing. The proposed VQ requires more memory and implements VQ encoder with codebook size which are in multiples of 4.KeywordsVector QuantizationImage compressionLBG AlgorithmImage encoderVLSIpipeliningFPGA