Abstract

ABSTRACT Design and fabrication of Organic Thin Film Transistor (OTFT) based miniaturized piezoelectric sensor is presented in this investigation. The device is fabricated on flexible polyethylene naphthalate (PEN) film, using the small-molecule hydrocarbon pentacene as the semiconductor layer and solution- processed polyvinylphenol as the gate dielectric. Field effect mobility of the OTFT is greater than 0.01 cm 2 /Vs, I on /I off current ratio greater than 10 5 . The piezoelectric polymer, Polyvinylidene Fluoride (PVDF) is used as the sensor layer th at is attached over the extende d gate metal electrode of the OTFT. OTFT, which is in close proximity with sensor, serves as the amplifier to amplify the signal generated by piezoelectric sensor. Keywords: Piezoelectric Sensor, OTFT, Flexible PEN , pol yethylene naphthalate substrate, Pentacene INTRODUCTION Fabrication of low cost, high sensitivity and miniatured flexible piezoelectric sensors are highly desirable for applications in various fields, including medical imaging, NDT, underwater acoustics etc. Compared to piezoceramics, PVDF and poly(vinlidene fluoride trifluoroethylene) copolymer (PVDF-TrFE) have low acoustic impedance and flexibility which permits applications on curved surfaces. With the advent of silicon IC technology, it is preferred to integrate the mechanical elements with microelectronic devices on a common silicon substrate to fabricate low cost, highly sensitive and miniaturized sensors. A prototype of PVDF-MOSFET structure was first realized by Swartz and Plummer [1]. In this structure, a sheet of PVDF film was bonded to the extended gate of a MOSFET, resulting in a structure named as piezoelectric-oxide-semiconductor field-effect transistor (POSFET). Since the POSFET structure combines the active electronics with the sensing element on the same chip, it has been widely used and studied as an essential structure for piezoelectric or pyroelectric sensors using PVDF and P(VDF-TrFE) materials [2,3]. The major disadvantage in this structure is the capacitance that exists between the extended gate electrode and the conductive silicon substrate, with the insu lating silicon dioxide layer acting as a dielectric material. Since the silicon dioxide layer i s much thinner than the sensor thickness, the parasitic capacita nce shunts a large part of the piezoelectric signal generated by the sensor and results in a significant reduction of the device sensitivity. Some methods have been suggested or developed to minimi ze the parasitic capacitance. Swartz and Plummer proposed a modified structure using high resistivity polysilicon or sapphire substrate to re place the silicon under the lower electrode [1]. Using this technique, the effective sensitivity was expected to increase by a factor of five or more. * Patent Pending

Full Text
Published version (Free)

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call