Design and development of electronics for the EuXFEL clock and control system

Abstract

The development of the Clock and Control (CC) hardware and firmware for the EuXFEL DAQ system is presented. The system exploits the data handling advances provided by the new telecommunication architecture standard for physics. The CC is responsible for synchronising the DAQ system to overall system timing. The hardware consists of a DESY designed MTCA.4 board and a UCL designed Rear Transition Module (RTM). Each RTM controls up to 16 Front End Modules (FEMs) for a 1 Megapixel 2D detector. The CC system is designed to provide extendibility and scalability to support future upgrades to the DAQ or larger detectors.