Design and Development of Bit Error Measurement using FPGA for Visible Light Communication

Muhammad Hamka Ibrahim,Subuh Pramono,Annisa Hanifa,Irwan Iftadi,Meiyanto Eko Sulistyo

doi:10.1109/isriti51436.2020.9315411

Design and Development of Bit Error Measurement using FPGA for Visible Light Communication

Muhammad Hamka Ibrahim, Subuh Pramono + Show 3 more

https://doi.org/10.1109/isriti51436.2020.9315411

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Publication Date: Dec 10, 2020

Citations: 1

Affiliation: Sebelas Maret University

#Bit Error Rate Measurement #Flexibility Of Field Programmable Gate Array + Show 8 more

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Abstract

Bit error rate (BER) is a fundamental performance measurement of data transmission and communication link. BER measures. Incorporating with digital baseband processing in transceiver, BER measurement can be integrated in a field programmable gate array (FPGA). A Cyclone IV E EP4CE115 is implemented as BER tester to measure performance of visible light communication (VLC) link. The flexibility of FPGA allows the proposed BER measurement system design to add features such as pseudo random bit sequence (PRBS) generator, burst error generator and delay control for synchronization. It shows that design capable to measure VLC link up to 2 Mbps due to limitation of VLC analog front end (AFE).

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