Design and Comparison of Low-Power, High-Speed T Flip Flop, and 4-Bit Asynchronous Counter Using Various Design Techniques

Abstract

AbstractMost of the real-time circuits are designed using the sequential logic, and designing sequential logic is slightly more complex than the combinational logic design. Alongside, memory devices play a very critical role in digital systems. A flip flop is a basic element in the designing of any sequential logic like the adders in the combinational logic design. In this paper, sequential logic circuits are designed using different technologies. This paper aims to design high-performance and highly efficient T flip flop and 4-bit asynchronous counter using the gate diffusion input (GDI), CMOS, and transmission gate-based (TGB) techniques and provides a comparison with each other for different parameters. In this paper, comparisons are shown for major VLSI aspects like area, power, delay, and power-delay product (PDP). Simulations are performed, and results are obtained for 180 nm technology with 1.8 V as input voltage using the Cadence virtuoso tool.KeywordsGDICMOSTGBAreaPDP