Design and characterization of compact 100 nm-scale silicon metal–oxide–semiconductor field effect transistors

Abstract

Ultracompact n-channel silicon metal–oxide–semiconductor field effect transistors (MOSFETs) have been fabricated using electron beam nanolithography for all critical levels leading to a first demonstration of silicon MOSFETs which meet 100 nm ground rules. The smallest devices fabricated have active areas which measure only 700 nm×150 nm and are enclosed by a narrow trench isolation scheme. Devices of this size and with physical gate lengths of 120 nm and widths of 150 nm display an extrinsic transconductance of 410 mS/mm at room temperature. This level of miniaturization and performance arises in part from direct application of conventional scaling principles and in part from implementation of a novel device configuration. This article discusses the design of these devices as well as details of their electrical characteristics.