Abstract

Several designs for an up-down N-counter are derived for any N > 0. The up-down N-counter has a simple specification, but allows many non-trivial, efficient implementations. All designs are represented by means of a CSP-like program and are analyzed with respect to area, response time, and power consumption. Our final design has optimal area of Θ( log N), a bounded response time, and a bounded power consumption.

Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.