Design and Analysis of Second and Third Order PLL at 450MHz

B.K Mishra,Sandhya Save Sandhya Save,Swapna Patil Swapna Patil

doi:10.5121/vlsic.2011.2109

B.K Mishra, Sandhya Save Sandhya Save + Show 1 more

Open Access

https://doi.org/10.5121/vlsic.2011.2109

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Abstract

Designing of an analog circuit satisfying the design constraints for desired application is a challenging job. Phase Lock Loop (PLL) is an important analog circuit used in various communication applications such as frequency synthesizer, radio, computer, clock generation, clock recovery, global positioning system, etc. Since all these applications are operating at different frequency, satisfying design constraints for PLL with respect to type of PLL operating frequency, Bandwidth, Settling time and other parameters is an critical and time consuming issue. In this paper, selection and design for Second order and third order PLL suggested using MATLAB, Simulink as a simulation tool. The simulated results for the design PLL at 450 MHz indicates good accuracy when the behavior model is compared with the mathematical model. Finally the performance of PLL is tested and calculated for parameters like lock time, lock range, Bandwidth.

Highlights

A basic form of a Phase Lock Loop (PLL) consists of three fundamental functional blocks namely Phase Detector (PD), Loop Filter (LF), Voltage Controlled Oscillator (VCO).The block diagram of PLL is shown in the figure 1.The different types of PLL can broadly categories as Analog PLL, Digital PLL and Hybrid PLL
The set up arrangement done for PLL( Charge Pump PLL )is parameter measurement is shown in the figure 5
For analysis of third order PLL setup used is almost same as second order PLL, Input for assemble are Transfer Function of loop filter, Kvco, quiescent frequency of VCO

Summary

INTRODUTION

Phase locked loop is an excellent research topic as it covers many disciplines of electrical engineering such as Communication Theory, Control Theory, Signal Analysis, Noise Characterization, Design with transistors and op-Amps, Digital Circuit design and non-linear circuit analysis. For low-speed applications, phase-locked loop (PLL) systems can be implemented in DSP [19], [21]. A basic form of a PLL consists of three fundamental functional blocks namely Phase Detector (PD), Loop Filter (LF), Voltage Controlled Oscillator (VCO).The block diagram of PLL is shown in the figure 1.The different types of PLL can broadly categories as Analog PLL, Digital PLL and Hybrid PLL. In this work, the performance of PLL designed for 450 MHz frequency is tested against VCO sensitivity, free running frequency, amplitude and phase of VCO, Loop filter transfer function.

LINEARIZED PHASE DOMAIN MODEL FOR PLL

FRAME WORK FOR PLL DESIGN

RESULT

CONCULSION