Design and analysis of high performance current reference generators for low-power CMOS data converters

Abstract

Based on a highly accurate current divider using switched current technique without the need of well-matched components, a current reference generator (CRG) circuit is developed to generate and hold the weighed currents used in the data converters. This paper also presents a methodology for designing high-performance CMOS CRG circuits for low-power applications and their performance analysis for estimating the accuracy, speed, and power consumption. To demonstrate the design procedure and performance analysis, several design examples are given. The simulation results show that, for a 6-bit CRG circuit, its calibration time and holding time are 27 and 242 /spl mu/s, respectively, and for a 8-bit CRG circuit, they are 48 and 236 /spl mu/s, respectively. The circuit consumes 1.8 mW and achieves better than 10-bit accuracy, where a MOSIS SCNA20 2-/spl mu/m process and a 3.3-V supply voltage are employed. Thus, the developed CRG circuit is well suited for low-power/low-voltage and moderate resolution data converters.