Design and Analysis of a Broadband Current-Mode CMOS Direct-Conversion Receiver Frond-End Circuit

Abstract

A broadband (0.8–5[Formula: see text]GHz) CMOS current-mode direct-conversion receiver has been integrated in a 0.18-[Formula: see text]m CMOS process. The proposed receiver front-end features a broadband active-balun low-noise transconductance amplifier (LNTA) driving a current-mode passive mixer terminated by a low-input-impedance transimpedance amplifier (TIA). The receiver chain has improved robustness to out-of-band interference, conversion gain and outstanding linearity. With the technique of noise and distortion cancellation which performs a better input impedance matching, we employ a broadband common-gate–common-source (CG–CS) LNTA and a current mirror to improve both gain and noise figure (NF) performance. Compared to the 50% duty-cycle switching stage, the 25% duty-cycle I–Q switching stage is implemented by using serial switches driven by 50% quadrature local oscillator (LO) signals separately, which improves the down-conversion gain by 3[Formula: see text]dB and lowers the noise figure. The transimpedance amplifier employs the [Formula: see text]-boosting technique to realize low input impedance and high transimpedance gain. The core circuit (RF and baseband signal path) consumes 26[Formula: see text]mW, and the prototype receiver achieves approximately 33–34.5-dB conversion gain, 8.1–9.35-dB NF and 7.5–9.8-dBm IIP3 from 0.8[Formula: see text]GHz to 5[Formula: see text]GHz.