Design and Analysis of a 1.8-GHz Open-Loop Modulator for Phase Modulation and Frequency Synthesis Using TDC-Based Calibration

Abstract

A nonlinearity calibration technique is proposed for an open-loop phase modulator (PM), for wideband phase modulation, and for multiple-output, low-jitter clock generation. The design considerations and key performance aspects of the calibration technique are discussed. The PM integrates a digital phase-locked loop, local oscillator distribution network, and digital calibration. A prototype was implemented in 0.13- $\mu \text{m}$ CMOS 1.8-GHz Gaussian frequency shift keying (GFSK) transmitter integrated circuit. Measurements on the prototype show that out-of-band quantization noise is 56 dB lower than that of the signal when transmitting 20-Mb/s GFSK signal and the rms error is only 3.2%. The power consumption of the PM is 18 mW. The measured spurious tones of the clock generation unit are below −46 dBc.