Abstract
High Level Synthesis (HLS) tool does not only simplify the designing operation and rapid prototyping but also allows the designers to explore large number of design’s techniques such as parallelism, pipeline, memory partitioning and many other techniques. Turbo decoder based on Maximum APosterior Probability (MAP) algorithm is designed in this work using Vivado HLS. The normal turbo decoder with two MAP decoders were implemented with and without parallelism and proposed a new design of turbo decoder with one MAP decoder and it was designed with and without parallelism using different window technique in HLS tool which it is not explored previously. These designs were implemented for different frame size in this work. A comp-arison in latency and resource utilization where done and how a tradeoff done between these two parameters to reach the specific design that we need. The new design produces better results.
Highlights
Communication systems are one of the most important elements of the requirements of modern times
While a master’s thesis in [5] proposed by Conn, three types of turbo decoders were designed. These designs were implemented with different architecture using high level synthesis (HLS) tool that used in software defined radios (SDR). 46 articles were studied on the quality of the results and design efforts
The whole programs were written in C++ language using Vivado High Level Synthesis (HLS)
Summary
Communication systems are one of the most important elements of the requirements of modern times. Which is a tool for rapid prototyping and production of hardware designs with short developmental cycles in Register Transfer Level (RTL) It is based on widespread high-level language (HLL)C/C++. While a master’s thesis in [5] proposed by Conn, three types of turbo decoders were designed These designs were implemented with different architecture using high level synthesis (HLS) tool that used in software defined radios (SDR). This work designs a normal turbo decoder with two decoders in iterative fashion in C++ language and make it fully parallel by unroll directive using Vivado HLS tool and make a comparative with a proposed turbo decoder with one decoder in iterative fashion and again made it fully parallels by same directive These two decoders are decoding three different frame size of 108, 216 and 432 received bits, with two different windows, 9 decoded bits of 27 received bits and 36 decoded bits of 108 received bits and compare these designs in latency and resources utilization
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