Abstract
An effective logic synthesis procedure based on functional decomposition of a boolean function is presented. A distinctive feature of the proposed method is that the decomposition is carried out as the very first step of the synthesis process. The presented procedure is suitable for various implementation styles, including PLAs, PLDs and FPGAs, The results of the bench-mark experiments presented in the paper show that, in several cases, our method produces circuits of significantly reduced complexity compared to the solutions reported in the literature. For example, the rd84 function has been implemented using a single component from the MMI PAL library or 6 CLBs in the XILINX 3000 family of FPGAs, whereas the best earlier reported results were 4 MMI PALs or 8 XILINX CLBs.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
