Abstract

A detailed study of the characteristics and origin of deep level traps in device-quality Si-implanted GaAs and in MESFET's has been made using an ultrasensitive optical DLTS technique. Efforts were made to elucidate the conditions which reduce or enhance trap concentrations. The effects of etching and long-term baking of substrates prior to implantation and prolonged annealing after implantation were investigated. These measurements were complemented by low-temperature photoluminescence measurements to establish the corresponding variation in the quality of the material. Several electron and hole traps were commonly observed, ranging in activation energy from 0.21 to 1.1 eV. It is believed that some of these centers are distributed in energy. Among others, two hole traps with activation energies of 0.43 and 0.72 eV and a 0.57-eV electron trap are dominantly present. The first is believed to be due to Cu, the second is probably related to a native defect and the electron trap seems to originate from lattice damage. The other centers are possibly complexes related to lattice damage and vacancies. Under certain conditions, changes in trap densities could be correlated with corresponding changes in some device parameters.

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