Dependence of current gain β on spacer geometry and emitter size in polysilicon self-aligned bipolar transistors

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For self-aligned bipolar technologies the sidewall region under the residual spacer, which is very much influenced by the spacer geometry, is a key feature. We have investigated the effect of the spacer geometry on the transistor performance, especially on the current gain β. The spacer geometry is arranged by varying its width separating the n + and p + lateral diffusions and by varying its depth penetrating into the monocrystalline silicon. It has been found that these two variations do not cause the same effect on β. Although the increase of both the spacer isolation depth and width causes an increase in β, β has an enhanced dependence on the spacer depth. This latter finding sets a limitation on the maximum spacer depth for the high performance bipolar transistors. A 2-D simulation is performed to demonstrate these effects.