Abstract
The dependence of avalanche breakdown voltage on the drift region length and buried oxide thickness of thin silicon-on-insulator (SOI) LDMOS transistors is reported. An ideal relationship between breakdown voltage and drift length is derived. Experimental SOI LDMOS transistors with near ideal breakdown voltages in the short-drift-length regime have been realized. Specifically, 380 V was achieved in a drift length of 20 mu m. Thin buried oxides are shown to be a major cause of deviation from this ideal. Experimental results verify this finding. An 860-V LDMOS transistor made in a 0.2 mu m-thick SOI layer is reported. >
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