Abstract
Through a systematic approach, PMOSFETs with strained quantum wells (QWs) in the Si-Ge system exhibiting high performance and low off-state leakage currents comparable to optimized gate stacks on Si are demonstrated. The encouraging results are due to selectively depositing Si-Si <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> Ge <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1-x</sub> -Si heterostructure QWs, where it appears that the critical thickness requirements for these thin films based on the lattice constant mismatch are relaxed. Furthermore, the use of optimal advanced high-k dielectric and metal-gate electrode helped realize the good device characteristics.
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