Degradable Self-restructuring of Processor Arrays by Direct Spare Replacement

Abstract

AbstractWith the increase in the number of processing elements (PEs) in modern highly integrated parallel systems, there has been a growing importance for designing an efficient self-restructuring method to automatically tolerate faulty PEs. In this paper, we present a self-restructuring method for mesh-connected processor arrays with spares on the orthogonal sides, based on the cooperation of the redundancy and degradation approaches. The redundancy approach replaces faulty PEs with spares, while the degradation approach deletes rows and/or columns of the arrays. First, we formalize the spare assignment problem in the redundancy approach as a matching problem in graph theory. Then, if no matching, i.e., no valid spare assignment, is found for an array with faulty PEs, rows and/or columns are deleted from the array so that a matching is successfully found for a degraded subarray. Finally, hardware circuits to realize the above process are presented. This leads to the realization of degradable self-restructuring of processor arrays, and implies that the proposed method is useful in enhancing especially the run-time reliability and availability of processor arrays in mission critical applications where first self-reconfiguration is required without an external host computer.KeywordsFault-toleranceMesh arrayDirect spare replacementSelf-restructuringBuilt-in circuit