Abstract
Background: Finding optimal processing conditions to reduce defectivity is a major challenge in high-resolution lithographic tools such as directed self-assembly and extreme ultraviolet lithography. Aim: We aim to develop an efficient automated method that can detect defects and identify their types and locations, allowing for assessing the performance of lithographic processing conditions more easily. Approach: We propose a deep learning approach using an object recognition neural network for the classification and detection of defects in scanning electron microscopy (SEM) images featuring line-space patterns. We optimized our network by exploring its design variables and applied it on a case with limited numbers of SEM images available for training the network. Results: With an optimized network and data augmentation strategies (flipping and mixing images from simulations), it was possible to achieve a significant increase in the performance of the network. Transferability of the network was also proven when applied on a more diverse dataset of SEM images gathered from selected publications. Conclusions: The outcome of our work shows that the amalgamation of an optimal network design and augmentation strategies performs satisfactorily for defectivity analysis and is generic for data not constrained to fixed settings.
Highlights
The progressive scaling of transistors in semiconductor manufacturing demands cost-effective lithographic techniques capable of smaller feature patterning with feature sizes below the 10-nm scale
extreme ultraviolet lithography (EUVL) is an approach relying on patterning features using a short-wavelength light source of 13.5 nm,[1] whereas directed self-assembly (DSA) exploits the self-assembly behavior of block copolymers that undergo microphase separation when coated on a wafer to create dense periodic features over large areas.[2,3]
As our study targets running the network with a small number of images available for a training set, we used only 100 scanning electron microscopy (SEM) images for the training set (SEMD100) and 475 SEM images for the test set; SEM images for training were randomly selected from the entire dataset and had 144 B, 184 dislocation pole (DP), 22 edge dislocation (ED), and 27 dislocation dipole (DD) with a total of 377 defects
Summary
The progressive scaling of transistors in semiconductor manufacturing demands cost-effective lithographic techniques capable of smaller feature patterning with feature sizes below the 10-nm scale. As potentially viable next-generation lithography candidates for features with line-space (L/S) patterns, several techniques have been proposed; among these, extreme ultraviolet lithography (EUVL) and directed self-assembly (DSA) are two of the most promising. EUVL is an approach relying on patterning features using a short-wavelength light source of 13.5 nm,[1] whereas DSA exploits the self-assembly behavior of block copolymers that undergo microphase separation when coated on a wafer to create dense periodic features over large areas.[2,3] Compared with EUVL, DSA has a lower cost of ownership because of the reduced number. Finding optimal processing conditions to reduce defectivity is a major challenge in high-resolution lithographic tools such as directed self-assembly and extreme ultraviolet lithography
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