Abstract
Hysteresis phenomenon in the capacitance-voltage characteristics under reverse-biased Schottky gate has been investigated for Al0.25Ga0.75N/GaN/SiC structures having three different gate surfaces. This parasitic effect was correlated with the presence of deep levels in our samples. Indeed, we have noticed the presence of two traps named H1 and A1; their respective activation energies, which are determined using capacitance deep level transient spectroscopy (DLTS) are respectively 0.74 and 0.16 eV. The H1 hole trap was associated to extended defect in the Al0.25Ga0.75N/ GaN heterostructure such as threading dislocations and was responsible of capacitance hysteresis phenomenon. The A1 electron trap appears only in the HEMT (1), which has the smaller Schottky contact area. This trap was related to a punctual defect and attributed to free surface states in the access region between the gate and the source.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
