Abstract

The dynamic on-resistance increase during power switching is one of the challenges of GaN-based HEMTs (high-electron-mobility transistors) for power electronic applications. Both the surface traps and buffer traps reduce channel carriers, resulting in decreased operating current during power switching. In this work, we propose a source metal trench toward the buffer region to alleviate channel carriers’ trapping in the buffer region. We compare the dynamic behaviors of the HEMTs with the source trench fabricated within and out of the mesa region. The results indicate less dynamic on-resistance increase at higher drain and gate stress voltages of the device with source trench in the mesa, as compared with the device with source trench fabricated away from mesa, or the one without a trench. We further develop physical models, including multiple current-conducting paths, reduction of buffer traps through source trench, and the re-distribution of the electric field profile, to explain the phenomenon.

Highlights

  • The Gallium Nitride (GaN) based high-electron-mobility transistor (HEMT) is considered a promising device for next-generation power electronics and radio-frequency (RF) applications because of the inherent advantages of nitride semiconductor such as high breakdown voltage, high electron mobility, and high thermal stability [1]–[3]

  • Electrons from the gate electrode are trapped by the GaN surface defects during negative gate bias, which results in the depletion of channel carriers underneath the gate-drain region near the gate side [8]

  • In this work, we propose a deep source metal trench toward the buffer layer in the GaN HEMT structure to mitigate the dynamic RON increase during high-voltage switching

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Summary

INTRODUCTION

The Gallium Nitride (GaN) based high-electron-mobility transistor (HEMT) is considered a promising device for next-generation power electronics and radio-frequency (RF) applications because of the inherent advantages of nitride semiconductor such as high breakdown voltage, high electron mobility, and high thermal stability [1]–[3]. Current collapse is known to be attributed to the electron trapping on the surface of the gate side of gate-drain region as well as in the (bulk) buffer region. During high-voltage operation, because of the fringing electric field between drain and source (and gate) electrodes, 2DEG (2-dimensional electron gas) carriers are forced to move across the intrinsic GaN barriers and trapped by the C-dopants and material defects [9]. The channel resistance increase during the stress state and decrease during recovery can be modeled based on the emission, redistribution, and retrapping of holes within the carbon-doped buffer [10]. For both of the phenomena described above, the. We characterized the dynamic channel resistance of the device with and without a deep source trench of various designs

DEVICE FABRICATION
RESULTS AND DISCUSSION
CONCLUSION
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