Abstract

Deep level transient spectroscopy (DLTS) characterization was performed after forming iron silicides on silicon by a solid state reaction at 450-850 degrees C. No deep levels were discovered in n-type silicon when the reaction took place on cleaned previously unprocessed wafers. When the silicide formation was applied to samples given a standard silicon oxidation procedure, two defect levels, correlated to the presence of iron, were detected by DLTS. None of the levels could with any degree of certainty be identified. The levels observed in n-type oxidized silicon had activation energies of approximately 0.30 and 0.33 eV. In p-type silicon a defect level appeared with activation energy of 0.40 eV both in chemically cleaned previously unprocessed and in oxidized silicon samples. The observed defect levels at 0.33 eV in n-type silicon and at 0.40 eV in p-type silicon showed defect profiles with lower concentration towards the silicide/silicon interfaces. All observed traps both on n- and on p-type silicon were removed by prolonged annealing or increased annealing temperature. This suggests that the formation of iron silicides on silicon may be compatible with silicon integrated circuit technology when considering electrically active defects.

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