Deep Level Transient Spectroscopy of Defects Induced by the Combination of CF4Reactive Ion Etching and Oxidation in Metal-Oxide-Silicon Capacitors.

Abstract

ABSTRACTMetal-Oxide-silicon (MOS) capacitors have been fabricated on CFbreactive ion etched silicon (n and p types) in order to study the defects at the Si-Si02interface and in the bulk of the substrate, produced by the combination of reactive ion etching (RIE) and oxidation. Bulk defects and fast interface states are analysed by Deep Level Transient Spectroscopy (DLTS) and the slow interface states in the oxide layer near the interface are probed by Tunnel-DLTS. A density of fast interface states in the range 1010-1011cm−2eV−1is observed for capacitors (both n and p types) fabricated with either dry or wet oxidations, and is probably due to disrupted or strained bonds at the Si-SiO2interface. The observation of bulk defects in the wet-RIE oxide samples but not in the dry-RIE oxide samples may be related to the shorter oxidation time for wet oxides (31mn) compared to dry oxides(190mn) and explained by a greater annealing of RIE induced defects during the dry oxidation. The bulk traps are identified to be related to carbon contamination, in SiC form, introduced during RIE. Finally, an increase of the slow interface states density is observed for the n-type dry oxide samples.