Decrease of FET threshold voltage due to boron depletion during thermal oxidation

Abstract

Oxidation of a boron doped silicon wafer reduces the surface concentration of boron due to segregation into the oxide. This in turn reduces the threshold voltage of an FET fabricated on such a wafer. This effect is calculated for realistic process types including a sequence of several oxidations at different temperatures. The threshold voltage is found to be reduced by about 1 V (1000 Å oxide) which is quite considerable. The depletion effect on threshold voltage is expressed in terms of two parameters (effective doping and apparent surface charge). The approximations used can be adapted to most processes. Also, the effect of boron depletion on the MOS capacitance-voltage curve is calculated. An apparent flat-band voltage shift of only 0·1 V is found (1000 Å oxide, 2 ohmcm).