Abstract
The digital adaptive equalization technique presented is characterized by a relatively simple algorithm and unique design features that permit fast adaptation in the decision-directed mode. For example, at 4800 bit/s the initial error rate in this mode may be as high as 25 percent, yet adaptation is assured. The equalization process is applied to the modified duobinary technique, but the principle is sufficiently general to employ any kind of system-correlative or multilevel. The present model employs primarily large scale integration (LSI), medium scale integration (MSI), and few integrated circuits; no discrete circuitry is included. As a result, simplicity, small size, low cost, and precision are achieved.
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