Abstract
Financial and commercial data are mostly represented in decimal format. To avoid errors introduced when converting some decimal fractions to binary, these data are processed with decimal arithmetic. Most processors only have hardwired binary arithmetic units. So, decimal operations are executed with slow software-based decimal arithmetic functions. For the fast execution of decimal operations, dedicated hardware units have been proposed and designed in FPGA. Decimal multiplication is found in most decimal-based applications and so its optimized design is very important for fast execution. In this paper two new parallel decimal multipliers in FPGA are proposed. These are based on a new decimal adder/subtractor also proposed in this paper. The new decimal multipliers improve state-of-the-art parallel decimal multipliers. Compared to previous architectures, implementation results show that the proposed multipliers achieve 26% better area and 12% better performance. Also, the new decimal multipliers reduce the area and performance gap to binary multipliers and are smaller for 32 digit operands.
Highlights
Algorithms 2021, 14, 198. https://Financial and commercial applications like accounting, banking, tax calculation, insurance and currency conversion require a large amount of data computing
All designs were described in VHDL and implemented in a Virtex-7 FPGA (-3 speed grade)
We have proposed a new decimal adder/subtractor and two new partial product generators for parallel decimal fixed-point multiplication on 6-input LUT FPGAs
Summary
Financial and commercial applications like accounting, banking, tax calculation, insurance and currency conversion require a large amount of data computing. To avoid errors created from binary calculation that could lead to unwanted result deviations [3,4], arithmetic operations must be done directly over decimal numbers [5] Their calculations must follow the conventions of decimal arithmetic and must keep a word length enough to support the precision required by these applications. Since the set of applications taking advantage of these specialized units is somehow limited, most processors only include some kind of specific instructions to help in the execution of decimal operations performed in software In this scenario, FPGAs (Field Programmable Gate Array) may be a good alternative for the execution of decimal arithmetic with dedicated hardware modules, like in many other applications [14,15].
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