Abstract
We address the problem of verifying the reachability problem in programs running under the formal model Px86 defined recently by Raad et al. in POPL'20 for the persistent Intel x86 architecture. We prove that this problem is decidable. To achieve that, we provide a new formal model that is equivalent to Px86 and that has the feature of being a well structured system. Deriving this new model is the result of a deep investigation of the properties of Px86 and the interplay of its components.
Highlights
Emerging Non-Volatile Random-Access Memories (NVRAM) provide the best of two worlds, namely the efficiency of DRAM, and the data persistency across failures of a non-volatile store [Intel 2019c; Liu et al 2020]
In this paper we focus on the latter model, and on, we implicitly refer to Px86sim when we talk about the persistency x86/Total Store Order (TSO) model
Despite the complexity of the Px86 model, we prove in this paper that the reachability problem for finite-state programs under that model is decidable. We show that this problem is reducible to a decidable reachability problem in the well-known framework of well-structured transition systems (WSTS) [Abdulla et al 1996; Finkel and Schnoebelen 2001]
Summary
Emerging Non-Volatile Random-Access Memories (NVRAM) provide the best of two worlds, namely the efficiency of DRAM, and the data persistency across failures of a non-volatile store [Intel 2019c; Liu et al 2020]. We maintain information about at most one flush instruction per variable in each thread load buffer, and show that this suffices to simulate the basic scheduling semantics This fact is crucial for obtaining a monotone model. We transform write instructions in the final persistency buffer into memory snapshots, in the spirit of the techniques employed in [Atig et al 2010, 2012] From this reduction, we deduce that the verification problem of the reachability problem in finite-state programs is decidable. We define a new operational formal semantics that is equivalent to the Px86 model [Raad et al 2020] up to state reachability, and which has the property of defining a well-structured system This model is based on establishing a clear separation between the pending and persistency stages. A new equivalent model to Px86 model [Raad et al 2020] has been developed independently by Khyzha and Lahav [Khyzha and Lahav 2021]
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