Dead-time optimization of SiC devices for voltage source converter

Abstract

Dead-time in the voltage source converter significantly affects the reliability, power quality and losses. For SiC devices, considering the high sensitivity of turn-off time to the operating conditions (> 5× difference between light load and full load), as well as large extra energy loss induced by reverse conduction during superfluous dead-time (∼ 15% of the switching loss), traditional fixed dead-time setting becomes inappropriate. This paper introduces an approach to achieve optimum dead-time for SiC based voltage source converter. First, turn-off behaviors under various operating conditions are investigated, and the relation between optimal dead-times and load currents are established. Second, a practical method for adaptive dead-time regulation is proposed, which consists of a dead-time optimization model and two gate assist circuits to sense the voltage commutation time during turn-off transient. Via synthesizing the monitored switching condition together with the preset dead-time optimization model, the micro-controller is able to online adjust the dead-time. Finally, based on a buck converter with 1200-V SiC MOSFETs, the test results show that by means of the proposed method, the power loss decreases by 12% at full load and 18.2% at light load.