DDDMOSFET Performance Improvement by Gate Oxide Removal Followed by Silicided Source/Drain Formation in Gate Slots

Abstract

In this work, the intentional insertion of slots in metal gate (MG) is introduced to solve the dishing issue for the double-diffused drain MOSFET (DDDMOSFET) fabrication. For traditional DDDMOSFET, the gate oxide layer in slots will be reserved to improve the device reliability, which requires an additional photomask to screen the gate/slot regions during the following sidewall formation and source/drain (S/D) implantation. This makes the process more complicated with increased cost. Without that additional photomask, it is proposed that the removal of gate oxide layer in slots can directly allow the floating S/D formation and the followed Ni silicidation there. It is demonstrated that such a novel process can not only relieve the MG dishing issue but can also effectively result in ~16% higher ON current and comparable OFF current for both N- and P-DDDMOSFETs without threshold voltage shift after applying electrical stress on gates. It is also revealed that the floating silicided S/Ds in slots have negligible influence on device breakdown characteristics. By saving one photomask, this work proposes a novel solution for the effective integration of core devices with very small feature sizes and high-voltage (HV) devices with large feature sizes in the same die, which is a common challenge for display driver chip fabrication using high- <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${k}$ </tex-math></inline-formula> /MG (HK/MG) technology.