Abstract

Thin (Gd–In) oxide films were prepared by alternating deposition method on Si (P) substrates to form MOS structures in order to investigate their dc-electrical properties. These films were annealed at different conditions and characterised by X-ray fluorescence (XRF) and X-ray diffraction (XRD). The capacitance–gate voltage ( C– V g) dependence was used to study the effect of annealing conditions on the effective relative permittivity, concentration of the charges in the film, and determination the accumulation voltage region. The dc-current transfer in the samples is studied as a function of gate voltage at accumulation polarity and temperature in the range (293–390 K). The measurements showed ohmic conduction at low voltages. But, at voltages V > 0.4 V, the current transfer followed the trap-charge-limited space-charge-limited conductivity (TCLC–SCLC) mechanism characterised by exponential distribution of traps within the band gap. The total traps concentrations are 4.1 × 10 24 m −3 and 2.2 × 10 24 m −3 for samples annealed in oxygen atmosphere and in vacuum, respectively.

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