DATAPATH: A CMOS Data Path Silicon Assembler

Abstract

As an integration of automatic silicon assembly and simulation tools, the DATAPATH Silicon Assembler produces mask geometries and netlists from input specifications written in a Hardware Description Language, MADL. DATAPATH consists of a library of data path cells (i.e. registers, bus prechargers, drivers, interconnects, ALU's and other logic elements) in a flexible bus architecture. The cells are highly parameterized and procedurally described in a hierarchical manner. The layout is automatically generated using a LISP-embedded procedural description language, ICPL, and is independent of design rule changes as a result of parameterization. This paper describes the DATAPATH Silicon Assembler synthesis process which includes the users' interface, the automatic layout generation, the architecture, library and the verification process, all in a single engineering workstation system.