Abstract

Two-dimensional (2-D) semiconductors have been intensely explored as alternative channel materials for future generation ultra-scaled transistor technology [1–8]. However, significant roadblocks (e.g., poor carrier mobilities [9–11], instability [4,5,10], and vague potential in scaling-up [10,12–15]) exist that prevent the realization of the current state-of-the-art 2-D materials’ potential for energy-efficient electronics. The emergent solution-grown tellurene exhibits attractive attributes, e.g., high room-temperature mobility, large on-state current density, air-stability, and tunable material properties through a low-cost, scalable process, to tackle these challenges [16]. Nevertheless, the fundamental manufacturing science of the hydrothermal processing for tellurene remains elusive. Here, we report on the first systematic, data-driven learning of the process-structure-property relationship in solution-grown tellurene, revealing the process factors’ effects on tellurene’s production yield, dimensions, and transistor-relevant properties, through a holistic approach integrating both the experimental explorations and data analytics. We further demonstrate the application of such fundamental knowledge for developing tellurene transistors with optimized and reliable performance, which can enable the cost-effective realization of high-speed, energy-efficient electronics.

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