Abstract
The formation of high-melting-point Cu6Sn5 interconnections is crucial to overcome the collapse of Sn-based micro-bumps and to produce reliable intermetallic interconnections in three-dimensional (3D) packages. However, because of multiple reflows in 3D package manufacturing, Cu6Sn5 interconnections will experience cyclic polymorphic transitions in the solid state. The repeated and abrupt changes in the Cu6Sn5 lattice due to the cyclic polymorphic transitions can cause extreme strain oscillations, producing damage at the surface and in the interior of the Cu6Sn5 matrix. Moreover, because of the polymorphic transition-induced grain splitting and superstructure phase formation, the reliability of Cu6Sn5 interconnections will thus face great challenges in 3D packages. In addition, the Cu6Sn5 polymorphic transition is structure-dependent, and the η′↔η polymorphic transition will occur at the surface while the η′↔ηs↔η polymorphic transition will occur in the deep matrix. This study can provide in-depth understanding of the structural evolution and damage mechanism of Cu6Sn5 interconnections in real 3D package manufacturing.
Highlights
Three-dimensional (3D) packages, which can merge chip technology and packaging technology together, have great application in overcoming the scaling limits in 2D integrated circuits (ICs)
The aims of this study were to explore the structural evolution of the Cu6Sn5 under multiple reflow processes, to study the damage mechanism induced by the cyclic polymorphic transitions, and to confirm the influence of cyclic polymorphic transitions on the reliability of Cu6Sn5
The aims of this study were to explore the structural evolution of the Cu6 Sn5 under multiple reflow maintained at thistotemperature for 10 min, and cooled down to 20 °C with a cooling rate of 20 processes, study the damage mechanism induced by the cyclic polymorphic transitions, and to
Summary
Three-dimensional (3D) packages, which can merge chip technology and packaging technology together, have great application in overcoming the scaling limits in 2D integrated circuits (ICs). The most typical characteristics of this technology are to vertically stack the multi-chips in a tight device space and to continuously minimize the interconnections on a limited chip area. There are four kinds of solder joints in 3D packages. The ball grid array (BGA) solder joints of 760 μm in diameter are above the printed circuit board (PCB). The controlled collapse chip connection (C4) solder joints of 250 μm in diameter are above the BGA package substrate. The Sn-bumps of 20 μm in diameter are located between the stacked chips and through-Si-via (TSV) structures. In 3D packages, the Sn-bumps of 20 μm in diameter must be completely transformed into the intermetallic (IMC) phase in the joints after the first reflow, to avoid joint collapse during multiple reflow processes [1]. The IMCs, e.g., Cu6 Sn5 , Cu3 Sn and Ni3 Sn4 , are quickly emerging as innovative high-temperature interconnection materials due to their unique abilities to join at low temperatures and operate at high temperatures [2,3,4,5]
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