Abstract
Abstract Electrostatic discharge (ESD) stress - induced damage is analyzed in smart-power technology ESD protection devices. The lateral position of the ESD damage in diode and npn transistor protection structures is analyzed by using backside infrared microscopy. The lateral extension of the ESD damage is correlated with the magnitude and shape of the IV characteristics. The vertical position of the ESD damage and its stress-induced progress from the surface contact region to the bulk is obtained from the analysis of the stress-evolution of both the reverse and forward leakage current characteristics and from numerical analysis. The damage penetration into the zero-bias space charge region of the breakdown-voltage controlling pn junction is indicated by the onset of the increase of the forward leakage current.
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