Abstract

A new circuit is proposed for the realization of a multiple-valued logic (MVL) neurode, an electronic approximation of a human neuron, in a current-mode CMOS logic (CMCL) technology. A set of multiple-valued logic operators is presented. These operators include min, tsum, window literal, cycle, and complement. Basic circuits used to realize the MVL-neurode are also given. HSPICE simulation results to verify the operation of the MVL-neurode circuit are reported. >

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.