Crystal orientation on the electrical properties of aTe-nSi heterostructure devices

Abstract

The effects of crystal orientation on the electrical properties of heterostructure devices fabricated by vacuum evaporation of tellurium film (aTe) on n-type crystalline silicon wafers (nSt) with surface orientations of (100) and (111) are investigated. Two of the devices are annealed in a vacuum at a temperature of 420K for 0.5 hour. Barrier height measurement are made using the Norde's plot function. This method is less sensitive to recombination current and series resistance effects. Barrier heights of devices fabricated on nSi (100) are higher than devices fabricated on nS1 (111). Current densities in aTe-Nsi (111) devices are higher than that of aTe-nSi (100) devices. Electrical conduction in annealed devices is lower than that of unannealed devices. Nigerian Journal of Physics Vol. 16(2) 2004: 131-134