Cryogenic-temperature investigation of negative bias stress inducing threshold voltage instabilities on 4H-SiC MOSFETs

Abstract

We investigate the effect of Negative-Bias-Temperature-Instability on 4H-Silicon Carbide MOSFETs at room and cryogenic temperature and found a large negative threshold voltage shift at T < 250 K. For T < 140 K, both capture and emission follow an almost ideal exponential transient. Cryogenic temperatures reveal fast interface traps, otherwise difficult to probe at relatively high temperatures; we attribute the threshold voltage shift to a high density of hole traps located: 1) close to the SiC valence band and able to emit within the measurement time window; 2) above the SiC valence band, responsible of the slow transient at low temperature. Finally, the extraction of the emission time constant via Capture Emission Time map analysis allowed to extract the activation energy of mechanism 2 (82 meV).