Abstract
This paper presents some recent research results in cryogenic bipolar technology which potentially can reduce 1/f noise and threshold variation at least an order of magnitude from the current CMOS technology. Silicon junction field effect transistors (JFETs) have been operated down to liquid-helium temperature. This is explained by a phenomenon newly observed in small-geometry JFETs. Silicon bipolar devices have been operated down to 40 K with current gain higher than 500. These device technologies have three application areas: (1) low-noise input circuits; (2) input circuits for low-impedance detectors such as mercury cadmim telluride (HgCdTe) photoconductors; and (3) interface circuits for superconducting devices which normally have low-input impedances. The results presented in this paper show the potential for very low-noise, high-density cryogenic bipolar circuits for on-focal-plane (on-FPA) signal processing.
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