Abstract
Silicon can be isotopically enriched, allowing for the fabrication of highly coherent semiconductor spin qubits. However, the conduction band of bulk Si exhibits a six-fold valley degeneracy which may adversely impact the performance of silicon quantum devices. To date, the spatial characterization of valley states in Si has remained limited. Moreover, techniques for probing valley states in functional electronic devices are needed. Here, we describe a cryogen-free scanning gate microscope for the characterization of Si/Si0.7Ge0.3 quantum devices at mK temperatures. The newly built instrument is the first cryogen-free scanning gate microscope capable of forming and measuring a quantum dot on a Si/SiGe device with an overlapping gate structure without compromising the ability to host multiple DC and microwave lines for quantum control experiments. The microscope is based on the Pan-walker design, with coarse positioning piezostacks and a fine scanning piezotube. A tungsten microscope tip is attached to a tuning fork for active control of the tip-to-sample distance. To reduce vibration noise from the pulse tube cooler, we utilize both active and passive vibration isolation mechanisms and achieve a root-mean-square noise in z of ∼2 nm. Our microscope is designed to characterize fully functioning Si/Si0.7Ge0.3 quantum devices. As a proof of concept, we use the microscope to manipulate the charge occupation of a Si quantum dot, opening up a range of possibilities for the exploration of quantum devices and materials.
Highlights
Active vibration isolation is achieved at room temperature, and pulse tube noise is further suppressed at mK temperatures using passive vibration isolation
The scanning probe consists of a dc-biased tungsten tip that is attached to a commercial qPlus tuning fork
Measurements of the noise power spectral density indicate an rms noise in the z tip–sample separation of ∼2 nm, comparable to other cryogen free microscopes. This level of noise demonstrates that scanning gate microscopy experiments can be performed on complicated electronic devices requiring >20 connections without sacrificing performance
Summary
Silicon spin qubits have rapidly evolved over the past decade and are a legitimate contender in the race to build a scalable quantum computer. The device fabrication process has matured, allowing for high yield and scaling up of modest one-dimensional Si quantum dot (QD) arrays. Recent experiments have demonstrated the suitability of Si/Si0.7Ge0.3 heterostructures as a platform for highly controllable Si spin qubits. Silicon’s small intrinsic spin–orbit coupling and long spin coherence times, accompanied by well-established industrial fabrication processes, have made Si/Si0.7Ge0.3 a promising platform for scalable quantum computing. The tensile strain of the Si quantum well induced by the larger lattice constant of Ge in Si/Si0.7Ge0.3 heterostructures partially lifts the six-fold valley degeneracy by raising the in-plane valleys in energy relative to the ±z-valleys.14 It is the two lowest lying valleys that have posed one of the great challenges to silicon-based spin qubit technology.. New valley splitting measurements have been developed that utilize single-shot singlet-triplet readout, pulsed detuning spectroscopy, or microwave spectroscopy in the circuit quantum electrodynamics architecture.. New valley splitting measurements have been developed that utilize single-shot singlet-triplet readout, pulsed detuning spectroscopy, or microwave spectroscopy in the circuit quantum electrodynamics architecture.23,28 All of these approaches require time-consuming cycling through multiple devices to acquire meaningful statistics. V, we demonstrate SGM of a Si/Si0.7Ge0.3 device, using the microscope tip, to control the charge occupation of a QD
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