Abstract

The main problem targeted in this manuscript is to reduce the software programs’ susceptibility to soft errors on unreliable or partially reliable hardware, and to improve the reliability of the overall system. This needs to account for the knowledge/information from both the hardware level (i.e., where the faults occur) and the software level (i.e., where the errors are observed). The problem gets even more challenging when considering optimization under tolerable performance overhead constraints, as typical for embedded computing systems. However, mitigating the hardware-level faults at the software level is not straightforward and poses several research challenges with respect to modeling and optimization at the respective software layers. This chapter presents a comprehensive overview of the proposed cross-layer reliability analysis, modeling, and optimization flow (Sect. 3.1) to address these research challenges. In particular, the goal is to enable reliable code generation and execution on unreliable hardware. The techniques at different system layers along with their interactions are highlighted.

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